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Emerging Photovoltaic Materials: Silicon & Beyond
Emerging Photovoltaic Materials: Silicon & Beyond
Emerging Photovoltaic Materials: Silicon & Beyond
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Emerging Photovoltaic Materials: Silicon & Beyond

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This book covers the recent advances in photovoltaics materials and their innovative applications. Many materials science problems are encountered in understanding existing solar cells and the development of more efficient, less costly, and more stable cells. This important and timely book provides a historical overview, but concentrates primarily on the exciting developments in the last decade. It includes organic and perovskite solar cells, photovoltaics in ferroelectric materials, organic-inorganic hybrid perovskite, materials with improved photovoltaic efficiencies as well as the full range of semiconductor materials for solar-to-electricity conversion, from crystalline silicon and amorphous silicon to cadmium telluride, copper indium gallium sulfide selenides, dye sensitized solar cells, organic solar cells, and environmentally-friendly copper zinc tin sulfide selenides.
LanguageEnglish
PublisherWiley
Release dateDec 3, 2018
ISBN9781119407683
Emerging Photovoltaic Materials: Silicon & Beyond

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    Emerging Photovoltaic Materials - Santosh K. Kurinec

    Part 1

    SILICON PHOTOVOLTAICS

    Chapter 1

    Emergence of Continuous Czochralski (CCZ) Growth for Monocrystalline Silicon Photovoltaics

    Santosh K. Kurinec1*, Charles Bopp1 and Han Xu2

    1Electrical and Microelectronic Engineering, Rochester Institute of Technology, Rochester, NY, USA

    2GT Advanced Technologies, Hudson, NH, USA

    *Corresponding author: skkemc@rit.edu

    Abstract

    The Czochralski (CZ) process is the most commonly used method to produce single crystalline silicon for the photovoltaic (PV) and semiconductor industry. As the demand for silicon increases, the pressure on the silicon production industry grows to create higher quantities of the material at reducing prices. Currently, monocrystalline silicon (mono-Si) costs approximately 20% more than the multi-crystalline silicon (mc-Si) as Si-PV substrate. Over the years, CZ-producing vessels have increased in size to support this increased demand. The current CZ vessels are more than double the size, with the ability to produce crystals with twice the diameter and 10 times the mass of the first CZ vessels introduced in the 70s. The increase in height of the pull chamber has in turn caused the depth and width of the molten silicon feed tanks to be increased. The continuous Czochralski (CCZ) method for silicon production has the potential to greatly reduce the cost of silicon wafers. It is an effective method to address the current issues in standard CZ fabrication. With these and cell structure advances, the average manufacturing cost difference between mono- and multi-Si cells is now at US$ 0.015/W. These factors along with higher conversion efficiency rates have resulted in mono-Si cells reaching a dominant position in generation costs. The purpose of this chapter review is to inform what CCZ offers, and the advantages the method provides through engineering advancements as well as through performance of cells constructed with CCZ grown ingots. In addition, CCZ opens the door for reducing the cost of n-type silicon for PV.

    Keywords: Continuous Czochralski (CCZ), Mono-Si, Ingot resistivity uniformity, Ga doping in silicon

    1.1 Introduction

    It is predicted that mono-Si will attain a share of 60% by 2027 over multi-crystalline Si for photovoltaics [1]. Historically, because in the early days of its development, the solar technology was mainly used for space applications and the p-type structure had better resistance to radiations for space applications. P-type wafers are also cheaper due to the CZ ingot process described in the following sections. However, most high-efficiency solar cells realized today are n-type solar cells due to their higher carrier lifetime. The n-type technology is also immune to light-induced degradation (LID), which is caused by formation of boron–oxygen defects in p-type Si. When using n-type solar cells, doped with phosphorus, this effect disappears. Also, n-type solar cells are less prone to metallic impurities of the silicon because of the absence of the boron–oxygen defect. It is predicted that the market share for n-type mono-Si will grow (Figure 1.1).

    Figure 1.1 Predicted market share of different wafer types for silicon solar cells [1].

    Current mono-Si solar cells are pseudo squares with dimensions 156 × 156 mm², projected to increase to 161.75 × 161.75 mm² by 2027. The current CZ crystallization process can produce total ingot mass of 800 kg, which will increase to 1000 kg by 2019. The continuous CZ process has the potential to move far beyond 1000 kg total ingot mass [1]. The following sections describe CZ and CCZ processes.

    1.1.1 The Czochralski (CZ) Process

    Monocrystalline silicon ingots are grown in a reactor furnace by the Czochralski method named after the Polish scientist Jan Czochralski, who discovered this method in 1916 [2]. The process starts with the stacking of a quartz crucible with polysilicon silicon feedstock, which is then loaded into a furnace. The silicon is heated to around 1500°C to ensure the melting [3]. While the temperature is raised, the air is pumped out of the furnace chamber, and argon is purged through the system. This is done to obtain an inert atmosphere, and the desired pressure is in the range of 15–50 mbar during the pulling process [4]. Then, a rod or cable with a silicon seed is dipped into the molten silicon, and as it is drawn up, a monocrystalline silicon crystal is grown on the seed crystal. Figure 1.2 illustrates the concept of CZ pulling. The vertical pulling movement of the seed rod or cable enables freezing of silicon in monocrystalline form with the seed as the template. The maximum pull rate, vpmax is determined by the heat balance between the heat conducted from the melt to the crystal plus the latent heat of fusion of silicon during freezing and the heat conducted/radiated away by the crystal. It is given by

    Figure 1.2 (a) Picture of a commercial crystal puller; (b) crucible with molten Si; (c) polysilicon charge; (d) different stages of CZ growth; (e) grown ingot; (f) shaping pseudo square wafer sawing [7].

    (1.1)

    where

    vpmax = maximum pull rate in cm/s

    L = latent heat of fusion, for Si = 430 cal/g

    ρS = density of solid silicon = 2.328 g/cm³

    σ = Stefan Boltzmann constant = 5.67 × 10–5 erg/cm² s K⁴

    ε = emissivity of Si = 0.55

    kM = thermal conductivity of molten Si = 0.048 cal/cm s K

    TM = melting temperature of Si = 1690 K

    r = crystal radius (cm)

    1 erg = 2.39 × 10–8 cal

    Substituting for the values above, the maximum pull rate for silicon crystal growth is obtained as

    (1.2)

    The pull rates are adjusted to shape the crystal. Initially pulled quickly, a thin crown is formed that serves as the break off point when the crystal is fully grown. Pull rate then decreases slowly, resulting in a widening of the crystal, producing a taper. When the taper reaches the desired size of the silicon wafer, the pull rate remains constant, growing the body used for wafer production. When the melt is nearly depleted, the pull rate is again increased to form the bottom, which is cone shaped to provide stability in the large crystal [5]. The crystal can then be removed, and the process is repeated. In a typical run, over 100 kg of silicon is added to the crucible. It takes approximately 5 h for the silicon to melt and for the process to begin. The crystal is typically grown at a rate of 2.4 to 3.5 inch per hour for an 8″-diameter ingot [6].

    The crucibles used in the CZ process are made of fused silica [8]. High-purity crystalline quartz sand or amorphous quartz powder is first poured into a rotating mold and heat is applied from an electric arc, and the quartz is melted to an amorphous glass. The fusion starts in the inside and spreads out to the mold walls. Gas bubbles of SiO are produced in the melt–crucible interface. The crucible can also react with the carbon in the graphite hot zone parts to form silicon monoxide. The two reactions producing SiO are

    In the CZ process, it is unavoidable that a certain amount of oxygen is incorporated from the quartz crucible. In order to remove most of the oxygen and silicon monoxide, a low-pressure argon gas is purged through the furnace chamber. The inert gas removes up to 98%–99% of the oxygen that is dissolved from the crucible [3]. As a result of this, only 1%–2% of the dissolved oxygen from the crucible ends up in the silicon ingot (Figure 1.3). For most semiconductor applications, this is not a concern. However, for high-efficiency solar cells, oxygen impurity is undesirable as oxygen forms precipitates that act as recombination centers, reducing the minority carrier lifetime.

    Figure 1.3 Oxygen source from the quartz crucible. Most (<98%) of the dissolved oxygen evaporates as SiO. The remainder is incorporated into the silicon crystal. Carbon comes from the graphite parts.

    In addition, the silicon monoxide reacts with the carbon in the graphite support to produce silicon carbide and carbon monoxide through the following reactions [9]:

    The minority carrier lifetime in the silicon wafers produced from the ingots grown by the CZ process is greatly influenced by the amount of carbon in the silicon. To achieve long lifetime in the silicon wafers, the oxygen and carbon content has to be reduced by controlling the gas formation in the crucible–melt interface. One method is to apply a strong magnetic field to control the convection in the silicon melt. This is called the MCZ method [10]. Since hot melted silicon conducts electricity, it is subjected to a force created by the interaction between the flow of the melted silicon and the magnetic field. As a result, the flow of the melted silicon is altered. Crystal properties are controlled by taking advantage of this characteristic. It reduces the dissolution of the crucible in the melt by controlling the melt convection. However, the MCZ method becomes expensive, requiring very high magnetic flux densities of ~10³ G superconducting magnets with cooling systems. It exceeds the recommended maximum 600 G for 8 h exposure recommended by the American Conference of Governmental Industrial Hygienists (ACGIH).

    In general, most impurities tend to segregate into the liquid during crystallization, leaving the solid proportionally purer. As the solidification (crystallization) proceeds, impurity distribution changes in the resulting solid silicon. For a silicon liquid/solid interface under equilibrium, a ratio of the impurity concentration in the solid (CS) to that in the molten silicon (CL) is defined as the equilibrium segregation coefficient, k0, as

    (1.3)

    It implies that with k0 < 1, impurity is rejected into the melt and with k0 > 1, impurity is drawn into the solid.

    Almost all impurities have k0 < 1 in silicon except oxygen. It is observed that the equilibrium segregation coefficient k0 is strongly correlated to the tetrahedral covalent radius. The covalent radius, rtet, is a measure of the size of an atom that forms part of one covalent bond. Large atoms are not easily incorporated into a silicon crystal, resulting in a small k0. Correspondingly, k0 has a strong correlation to the maximum solubility, represented by

    (1.4)

    except for oxygen, carbon, nitrogen and cadmium [11] (Table 1.1).

    Table 1.1 Equilibrium segregation coefficient k0, maximum solubility Cs,max and covalent radius rtet of common elements in silicon.

    Defining the following parameters in a crystal growth process:

    V0 = initial volume of melt

    I0 = initial number of impurity atoms in the melt

    C0 = initial concentration of impurities in the melt

    IL = number of impurity atoms in the melt at a given time

    CL = concentration of impurities in the melt at a given time

    Vs = volume of crystal solidified

    Cs = concentration of impurities in the solid

    The impurity concentration in the solid is given by the Scheil equation

    (1.5)

    where f is the fraction of volume solidified. In deriving the Scheil equation, the following assumptions are made:

    Well mixed approximation: The impurity concentration in the melt is uniform.

    Impurities, once incorporated in the solid, do not diffuse.

    Steady-state equilibrium condition is assumed.

    Sublimation of impurities from the melt is negligible.

    Assumption (i) can be achieved by constant stirring of the molten silicon. To incorporate diffusion effects, the Scheil equation is modified by considering a boundary layer, δ, between the solid/liquid interface and defining an effective segregation coefficient keff

    (1.6)

    where v is the pull velocity and D is the diffusion coefficient in the melt [12]. For slow solidification rate and thorough stirring (δ → 0), vδ/D «1, keff = k0. For fast solidification and/or no mixing, (δ → ∞), vδ/D »1, keff = 1.

    It implies that an increase in growth rate increases the segregation coefficient. In practical crystal growth conditions, effective segregation coefficient should be applied. The resistivity of the ingot as a function of the fraction solidified f is given as

    (1.7)

    where µ is the carrier mobility, which is a function of doping concentration. Figure 1.4 shows the calculated resistivity for boron and phosphorus for an initial melt concentration of 1.5 × 10¹⁵ cm–3 in each case using Equation 1.5 and Equation 1.7.

    Figure 1.4 Calculated resistivity as a function of fraction solidified for boron and phosphorus with C0 = 1.5 × 10¹⁵ cm–3.

    Since CZ is a batch process, each time an ingot is produced, the silicon must be heated to produce the melt. This is an energy-intensive process and is the main production cost in producing high-quality silicon for semiconductor and photovoltaic applications. In addition, varying resistivities can cause high quantities of waste to be produced, as not all the silicon is fit for production leading to increased wafer costs. The solution to this problem has existed for nearly half a century, but until recently has had little demand for implementation. Recently, by controlling the heat flow of the ingot growth chamber and at the solid–liquid interfaces in a CZ process, a 15% increase in pulling speed of wafers with high quality has been reported [13].

    1.1.2 Continuous Czochralski Process (CCZ)

    CCZ on the other hand is a continuous process. It was patented first in 1954 by G.W. Rusler, Minneapolis-Honeywell Regulator Company [14] and presently many configurations are being explored. Instead of requiring a large reservoir of molten silicon, the CCZ method takes advantage of the continuous addition of new silicon and uses a shallow reservoir decreasing the melt height, which offers many advantages.

    By continuously charging the polysilicon and dopant, the resistivity of the growing crystal is tightly controlled. The resistivity ρ of the CCZ crystal is given by

    (1.8)

    where ρ0 is the initial crystal resistivity at Vs = 0 and Cr is the incoming melt replenishment concentration. It can be observed that if Cr = koC0, the exponential term in Equation 1.8 is eliminated and the resistivity remains constant. The purity of the melt can be higher because of the constant addition of pure silicon, which controls the impurity and dopant concentrations, and the resistivity, which was problematic in the standard batch CZ method [15].

    CCZ leads to better-quality wafers produced with reduced energy cost, since the process can be continuous if desired without the need to restock and re-melt silicon. The already molten silicon is used to melt the silicon that is being continuously added, which greatly reduces the energy cost for the system. It is much more energy efficient, with only a small fraction of the total energy consumed in melting additional silicon.

    The difficulty in obtaining cheap silicon wafers is mostly due to the kinetics involved in the batch process. The increasing melt height in CZ vessels introduces convection patterns in the melt that affect the impurity buildup, resistivity, and cell performance. All of which have been studied intensely with promising results. CCZ allows for multiple crystals to be produced in each furnace while operating at lower melt heights due to the replenishment of the silicon used [16]. This increases the efficiency of the process as the solidification of the silicon can be done at increased rates. Decreasing melt height has many benefits, it reduces the dissolved oxygen in the crystal, which hampers performance while also allowing for more homogenous distribution of impurities and dopants (Figure 1.5) [17]. Contrary to what one can imagine, there is a slower buildup of impurities in a CCZ melt as compared to a CZ melt. This is because of the reduced amount of silicon and impurity concentration in the crucible any moment in production. It also allows for fewer oxygen atoms to be introduced to the crystal because less oxygen can dissolve in smaller volumes of silicon. These factors impact the resistivity of the ingot, and since the crystal is more uniform, there is also a more consistent resistivity for the entire ingot [16].

    Figure 1.5 Oxygen incorporation in CZ and CCZ as a function of fraction solidified.

    1.2 Continuous Czochralski Process Implementations

    There have been multiple different feed arrangements tested for CCZ, with the most popular two being solid pellets and liquid feeds (Figure 1.6). The liquid feed system was one of the earliest attempted methods for CCZ and involved a two-crucible method. The first crucible served as the feed tank where the silicon was melted and stored before being pumped into the second crucible where the crystals are grown [13]. This system demanded a large amount of space and energy increasing the initial starting cost of production. To remedy this, a solid feed system was developed where small 1-mm-diameter polysilicon pellets are introduced into the melt via a feeding mechanism [5]. The solid pellets are introduced in an outer section of the feed tank, which is separated by baffles from the center where the crystal is grown. The baffles are necessary to prevent pellets from drifting toward the crystal where they can combine, a fatal error resulting in failure to produce a single crystal.

    Figure 1.6 (a) A dual tank system. (b) The more commonly used baffle system.

    The baffles have their own issues, such as extra oxygen evolution and flow oscillations, reducing the quality of the crystal. To remedy this, experiments have been carried out with the hopes of removing the baffles. The CCZ setup without baffles instead uses the convection as well as crucible drum rotation to prevent the pellets from contacting the crystal [5].

    Calculations were performed, and it was determined that for 6″-diameter ingots pulled at a typical rate of 50 mm/h, a feed rate of 34 g/min was necessary to have a consistent melt height. The energy required to melt the pellets was calculated to be 1.8 kJ/s, which was approximately 2% of the total energy used in a CZ grower [6]. The crucible was rotated to provide uniform heat to melt these pellets; without rotation, the energy required for the phase transition would produce cold spots, causing solidification in the melt itself. Since the crystal itself is a cold spot, pellets experience a force toward the center due to the surface tension of the melt [14]. Surface tension decreases when temperature increases; it becomes less likely for the particles to become submerged and melt at an adequate rate.

    Experiments have been run on the temperature control of CCZ. The use of multiple heaters has been suggested, as well as the use of a cooling sleeve around the crystal itself to reduce thermal stresses from the melt. It was found that the introduction of a cooling sleeve did in fact reduce thermal stress, since it allowed less heat to be transferred through the crystal due to the lower temperature gradient. The temperature gradient through the melt increased by 20% radially, which allows for the crystal growth rate to be increased accordingly [15].

    Multiple heaters have also been employed to help reduce the turbulent flow inside of the melt caused by temperature gradients. In practice, a single heat source was not capable of providing the even heating required. The walls of the crucible have the highest temperature, and the temperature gradient decreases toward the center. It is for this reason that some CZ producers employ the use of magnetic fields to decrease this effect. The magnetic fields required add additional operating cost to the process, which is undesired [16]. When a series of three heaters were employed, the maximum temperature deviation was reduced greatly, resulting in a more uniform and well-mixed melt. Typically, in CCZ, the melt is in a state of turbulence, or oscillatory, which means that it is in the transition phase between laminar and turbulent flow. The oscillatory flows become influenced by crystal rotation and, in most situations, become turbulent. When this happens, impurities are increasingly likely to be introduced into the crystal [17]. This has the noted effect that the outer edges of the crystals have higher impurity concentrations than the center. Despite this, the CCZ method produces crystals with greater axial uniformity compared to traditional CZ [18]. The purpose of this rotation is to counteract temperature gradients in the melt, but even at high rotation rates, the effects are limited. The optimal rotation was found to be between 5 and 10 RPM. When operating at 5 RPM, oxygen concentration in the melt is at a minimum, while 10 RPM is optimal for the best crystal structure. Due to even heating from rotation, it was determined that the mean time to melt added pellets is between 1 and 2 s. The amount of feed that could be added to the melt was determined to be unaffected by the rotation of the crucible. High feed rates produced clumps of pellets that aggregated and do not melt as desired [5]. Schematic of a commercial CCZ process and actual CCZ system is shown in Figure 1.7.

    Figure 1.7 Schematic of a commercial CCZ process (left); actual CCZ system (right). Courtesy of GTAT.

    1.3 Solar Cells Fabricated Using CCZ Ingots

    In the current market, it is more cost-effective to produce p-type silicon rather than n-type. For this reason, n-type silicon makes up an extremely small amount of market share. The high cost of n-type Si is due to phosphorus’ low segregation coefficient of 0.35 compared to boron’s 0.8, giving more resistivity variation along the n-Si ingot. Moreover, p-type mono-Si products come with inherent disadvantages of having higher cell-to-module (CTM) loss and higher light-induced degradation (LID) [19, 20]. In addition, light-induced degradation (LID) due to boron–oxygen (B–O) complexes in boron (B)-doped, p-type monocrystalline silicon solar cells can result in significant loss in power output [21]. It has been reported that n-type Si has higher tolerance for the most common metallic impurities like iron [22].

    1.3.1 n-Type Mono-Si High-Efficiency Cells

    Current research on n-type silicon cells have shown that it outperforms p-type silicon in terms of efficiency, with efficiencies greater than 25%. To shift the market toward n-type, it must be possible to create n-type wafers at a cost that can compete with the industry standard p-type wafers. The oxygen concentration in the crystal also varies, but in a much more interesting fashion. In standard CZ, the top of the crystal has an extremely high oxygen concentration that decreases down the crystal until approximately 60% of the crystal has been pulled. The concentration then begins to increase again until the crystal is fully grown. This can cause up to 75% of the crystal to be unfit for the semiconductor industry [17]. CCZ provides the perfect solution for allowing low-cost production of n-type wafers. Many high-efficiency cell configurations are being reported, which include n-PERT (passivated emitter rear totally diffused) n-Pasha (passivated all sides H-pattern [23], and HJT (heterojunction) [24, 25] shown in Figure 1.8.

    Figure 1.8 Schematics of (a) n-PERT (passivated emitter rear totally diffused), (b) n-Pasha (passivated all sides H-pattern), and (c) HJT (heterojunction) solar cells.

    Many studies have investigated the minority carrier lifetime (MCLT), as well as open-circuit voltage (Voc), short circuit current (Jsc), and the fill factor of the cell (FF) of n-type cells grown by CCZ (Figure 1.9).

    Figure 1.9 The Jsc, Voc, FF, and normalized efficiency of HJT n-type cells made from CCZ ingots [23].

    Since the addition of polycrystalline can be controlled in CCZ, it is possible to maintain more constant resistivities as well as a low and uniform oxygen concentration. The ability of multiple crystals to be pulled in succession in CCZ also allows for more crystals to be produced with less downtime, increasing the production rate. Over 800 kg of ingots can be pulled from one single CCZ run [17]. Currently, nPERT and n-pasha are the highest-performing n-type cells currently being explored, and an experiment was performed to determine just how CCZ performs. The ingots produced by CCZ had a much more consistent resistivity, which was found to contribute to the enhanced minority carrier lifetime (MCLT) reported. On HJT cells produced from the wafers, as well as recorded on the length of the ingot, the MCLT only decreased by 8%, from 93% to 85% of the reference value [23].

    Additionally, there was no noticeable difference between wafers cut from different sections of the same ingot and when compared to the wafers grown with traditional CZ. This uniformity greatly increases the amount of controllability in the manufacture of HJT cells, since one bad cell limits the entire stack’s performance. There were no noticeable differences between HJT cells made with CZ and CCZ; the efficiency of 22.2% was reported for the CCZ cells [23] (Figure 1.10). In another experiment, nPERT and n-Pasha cells were created from trimmed 6″ wafers produced from the last three ingots of a five-ingot CCZ run. The efficiency, Jsc, and FF of the cells produced by CCZ were comparable to the CZ grown reference of 4.7 Ω cm. Surprisingly, the Voc in some of the CCZ cells were slightly higher than those of the reference, with the majority performing better than the top 50% of wafers from the reference [17].

    Figure 1.10 (a) The resistivity over the length of a CCZ ingot; I–V curve of an HJT cell made from a CCZ ingot [23].

    1.3.2 Gallium-Doped p-Type Silicon Solar Cells

    An approach to prevent the formation of B–O complexes is to replace the boron with the gallium (Ga) as the dopant in silicon. However, gallium has a very low segregation coefficient in silicon (k0 = 0.008), which gives rise to much higher resistivity variation along the length of the crystal using conventional CZ process. Figure 1.11 plots Ga concentration and ingot resistivity as a function of fraction solidified for an initial Ga melt concentration of 10¹⁸ cm–3.

    Figure 1.11 Calculated Ga concentration and resistivity of CZ grown as a function of fraction solidified.

    As is observed, this limits the yield of usable crystal for making the solar cells. Low yield increases the wafer production cost. The CCZ process can overcome this by continuous feeding of silicon feedstock, enabling crystals with extremely uniform resistivity distribution regardless of segregation coefficient as shown in Figure 1.12 [26].

    Figure 1.12 Resistivity uniformity in Si ingot grown using CCZ process with Ga containing melt [26].

    To achieve <1% LID in p-type cells, low base resistivity (<1 Ω cm) is desirable, which increases doping, enhancing B–O complex formation in boron-doped base. Replacing Ga eliminates this problem. In a recent paper [26], the authors have shown that LID can be controlled to <1% with Ga doping.

    1.4 Conclusions

    The continuous Czochralski (CCZ) method for silicon production has the potential to greatly reduce the cost of silicon wafers by accelerating the ingot crystallization process. It is an effective method to address the current issues in standard CZ fabrication by reducing the oxygen pickup from the crucible. CCZ also provides a solution for allowing low-cost production of n-type wafers. Since boron forms B–O complexes, p-type Si is prone to light-induced degradation. Gallium doping can mitigate this problem. The CCZ process enables the production of Ga-doped mono-Si ingots of very uniform resistivity distribution, thus increasing the material yield and lowering the production cost.

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    26. Zhang, Y., Li, Q., Zhou, R., Xu, H., Turchetti, S., & Keohane, S. Gallium doped monocrystalline silicon by continuous Czochralski process for making light induced degradation free p-type PERC cells, 33rd European Photovoltaic Solar Energy Conference and Exhibition, Amsterdam, Netherlands, September 2017.

    Chapter 2

    Materials Chemistry and Physics for Low-Cost Silicon Photovoltaics

    Tingting Jiang1* and George Z. Chen1,2,3†

    1The State Key Laboratory of Refractories and Metallurgy, College of Materials and Metallurgy, Wuhan University of Science and Technology, Wuhan, P.R. China

    2Advanced Materials Research Group, Faculty of Engineering, University of Nottingham, Nottingham, UK

    3Energy Engineering Research Group, Faculty of Science and Engineering, University of Nottingham Ningbo China, Ningbo, P.R. China

    *Corresponding author: ttjiang@wust.edu.cn

    †Corresponding author: george.chen@nottingham.ac.uk

    Abstract

    Silicon has remained the most important material in the past century for making photovoltaic (PV) cells (panels) with proven high reliability and limited efficiency degradation over 25 years. Today, silicon panels share as high as 90% of the global PV market and are persistently attracting significant research and commercial efforts for improvement in photovoltaic conversion efficiency, which is the key lever for the whole PV cost reduction. The fundamental efficiency limit is determined by several factors, including the bandgap, the capture of all photons with energy above the bandgap, and the collection of all generated carriers. Material quality is a key factor affecting the final optical-to-electrical conversion efficiency, particularly in relation with carriers trapping by the bulk, interface, and interfacial defects.

    Various approaches have been attempted to enhance the efficiency of silicon solar cells, such as (1) the multicrystalline silicon-based scalable passivated emitter and rear cell (PERC) with an efficiency of 21.3%, (2) the interdigitated back contact (IBC) cell that could achieve high short-circuit current with a more completed collection of generated carriers, and (3) the silicon heterojunction (SHJ) solar cells having a high open-circuit voltage by avoiding carrier recombination in highly doped n-type and p-type regions as well as eliminating the high-temperature diffusion process.

    This chapter will briefly review recent research and development in silicon-based materials for advanced solar cells in terms of material preparation, defect and impurity control, structure–property relationship, and material device effect in different cell structure designs of both mono- and polycrystalline silicon photovoltaics.

    Keywords: Crystalline silicon, solar cell, high efficiency, low cost

    2.1 Introduction

    Sunlight is the most widely utilized renewable and clean energy source compared with others such as wind, tide, biomass, and geothermal energy. From the first silicon solar cell built in the Bell Institute in 1956, photovoltaics have gained plenty of attention all over the world. According to Martin Green, there are three generations in the development of solar cells. Silicon-based solar cells, as the first-generation solar cell, have gained great progress in recent decades and already reached grid parity in many countries, which is the most commonly used in photovoltaic modules. Silicon-based solar cells have dominated the market for a long time. In the past year, Fraunhofer-Institute and KANEKA independently reported efficiencies of 22.6% and 26.3% for multicrystalline silicon (mc-Si) and monocrystalline silicon (mono-Si) photovoltaics, respectively [1, 2]. At the same time, the latest reported cost of solar photovoltaic electricity is less than 0.02 US$/kWh according to the news report (under final confirmation in 2018).

    With a rich storage in the earth’s crust and the capability of being used as an important material in both the electronic and PV industries for a long time, silicon has various advantages, including high stability, nontoxicity, well-understood physical and chemical properties and PV performance, and maturity in manufacturing. Silicon is an indirect semiconductor, with the energy bandgap of 1.12 eV at room temperature, and hence the relatively large lifetimes and diffusion lengths. This bandgap perfectly matches the AM 1.5 standard solar spectrum. However, considering direct recombination, defect-assisted recombination and Auger recombination, the theoretical efficiency of a single-junction silicon solar cell is 29.4% according to the Shockley–Queisser Formulation [7].

    Due to the indirect bandgap of Si, the absorption coefficient is relatively low and varies only gradually around the bandgap energy so that a relatively thick wafer is required to absorb all the lights with photon energies above the bandgap. This increases the materials cost and leads to more recombination in the bulk, which would reduce the open-circuit voltage. The current silicon wafer thickness for solar cell is usually between 100 and 200 µm because of the trade-off between cost, manufacturability, and performance [8–11].

    The fundamental efficiency is determined by several factors, including the bandgap, the capture of all photons with energy above the bandgap, and the collection of all generated carriers. Material quality plays the key role in determination of the final photovoltaic conversion efficiency, particularly in relation with carriers trapping by bulk, interface, and interfacial defects. Based on advanced silicon materials, solar cells with improved structure could exhibit high efficiencies [12, 13] as shown in Table 2.1.

    Table 2.1 Performance parameters of difference silicon solar cells discussed in this chapter.

    The mc-Si solar cell can be manufactured by more ordinary technologies at lower cost and hence surpasses mono-Si solar cell in the market share. However, mono-Si PV always presents 1%–2% higher conversion efficiency over the mc-Si PV. As a result, most new strategies in cell structure pursuing better cell performance are based on mono-Si, while many efforts on material quality improvements are based on mc-Si. This chapter gives a brief overview of basic concepts in silicon solar cell and recent research progresses in improvement of the cell performance.

    2.2 Crystalline Silicon in Traditional/Classic Solar Cells

    2.2.1 Manufacturing of Silicon Solar Cell

    For the most common silicon solar cell in the photovoltaic market, the typical manufacturing process of a wafer-based crystalline silicon photovoltaic module is as follows:

    Polysilicon from reduction of SiO2

    Purifying the polysilicon to 6N (99.9999% pure)

    Wafering from silicon casting ingot or Cz ingot

    Silicon wafer to cells; module

    The very first raw material is the high-purity SiO2. In most procedures, SiO2 would be reduced by high-quality carbon in an electric-arc furnace. The achieved silicon is called metallurgical silicon with a purity around 99%. Fe, Al, Ga, and other elements are the most common impurities. Then, the metallurgical silicon would be purified by chemical route like the Siemens method, to solar grade silicon with a purity of 99.9999%. Silicon ingot growth could be realized by Czochralski or directional solidification to obtain monocrystalline silicon and multicrystalline silicon, respectively [14]. At last, wafers are sawed by wire cutting from the silicon ingot.

    Figure 2.1 presents a normal silicon solar cell manufacturing process with a p–n junction from phosphorus diffusion and the Al-back surface for the whole wafer.

    Figure 2.1 Process of fabricating a typical p-type silicon solar cell. Reprint from [15], with permission from Elsevier, Copyright (2013).

    Wafers are received through wire cutting from the ingot firstly. The traditional cutting method is steel wire cutting, and in recent years, diamond wire cutting began to have a bigger market share due to the higher cutting efficiency and hence lower cost for each wafer. However, for both cutting techniques, there is always a damaged layer from sawing on the wafer surface, which contains lots of surface defects and could become the minority carrier recombination center with a quite high density. Some polymers used in the cutting process may remain on the wafer surface and could cause damage to the cell performance. Chemical solutions are used to remove the layer and clean up the contamination from sawing and transporting. Another important purpose of this very first process is the surface texturization, in order to reduce the reflection of the wafer to achieve a higher light absorption probability. For single-crystalline silicon, alkaline solution could etch the wafer at various etching rates in different lattice planes, resulting in a light-trapping pyramid-like surface. For mc-Si, acid solutions like HF:HNO3 = 3:1 in volume are usually selected, leaving a massif-like morphology. The etching reactions are as follows, respectively:

    (2.1)

    (2.2)

    (2.3)

    The tendency of laminating cells is developing fast in recent years. As a result, fragment in the washing step should be taken into consideration carefully.

    The solar cell is a p–n junction device, so the junction production is one of the most important processes. Generally, the textured wafer would undergo a high-temperature annealing, which would drive in the dopant—usually phosphorus—to form a several-micrometer-thick n-type layer. In that case, the junction is achieved and this n-doped region is usually called emitter, in which the light-generated electron and hole pair can be separated and effectively collected [16–20]. The phosphorus diffusion is common at approximately 850°C–900°C in an atmosphere of N2 or Ar with phosphorus oxychloride (POCl3) as the phosphorus source. At first, the liquid POCl3 with N2 as carrier gas is pre-deposited on the wafer surface in a quartz tube furnace. Then, in the drive-in process, phosphorus diffuses into the wafer in a N2/O2 atmosphere at an elevated annealing temperature. The formed junction is in gradual change and the phosphorus concentration has a peak value of around 10²⁰ cm–3 (close to the solid solubility of phosphorus in silicon at the driven-in temperature) near the surface. The junction depth is about 0.5 µm and the sheet resistance is 60–100 Ω/□, where the square symbol means the resistance is measured at the two opposite sides of a square sheet of uniform thickness. During this process, O2 is important to react with POCl3 to form phosphorus pentoxide. The reactions are given below:

    (2.4)

    (2.5)

    The phosphorus diffusion step has another benefit for solar cells, especially the multicrystalline silicon. During the phosphorus diffusion, metallic impurity contamination in the bulk of the material would be reduced as a gettering effect. Transition metals like iron, nickel, chromium, and copper could be gettered effectively to the surface region, and therefore the minority carrier recombination lifetime is enhanced [21, 22].

    After this diffusion step, a thin phosphosilicate glass (PSG) layer would form over the wafer surface, inducing surface recombination center [23–25]. A dip in HF solution could remove this layer easily and, at the same time, complete the edge isolation. It is inevitable that during the diffusion process, the edge and back side of the wafer would become a shallow n-doped region, which is detrimental for the cell property from probable leakage current at the edge. The wet chemical approach in the HF solution could ensure that only one p–n junction is formed at the top of the solar cell and the PSG layer is removed thoroughly.

    Although the surface texture is effective for light trapping, it is necessary to lay up an insulator layer on top of the wafer for a higher antireflection effect. In industry engineering, a layer of SiNx:H thin film is usually deposited on the wafer surface by plasma-enhanced chemical vapor deposition (PECVD). SiH4 and NH3 are induced into the plasma reaction chamber and react into the blue-colored SiNx film with a thickness of about 75 nm. Except for antireflection, the SiNx:H thin film also could passivate the front surface, reducing the surface recombination since H could interact with the surface dangling bond.

    The next step is the metallization of the front and back surface. For more than 40 years, silk-screen printing of Ag paste is utilized to form the front metallic contact, which has been proven to be an effective ohmic contact. At the back surface, aluminum paste is used to print a back surface field (BSF), and the back contact is the same as the front contact. Hence, a p+ region is prepared near the back surface, followed by drying at 200°C and co-fired at around 800°C in sequence.

    At last, the fabricated solar cells would undergo a current–voltage (I–V) test, in order to detect cell quality and eliminate the imperfect ones.

    2.2.2 Efficiency Loss in Silicon Solar Cell

    The bandgap of silicon is 1.12 eV at room temperature, which is quite suitable for the standard solar spectrum. According to the detailed balance, the mobility is infinite, allowing collection of carriers no matter where they are generated, and all photons above the bandgap can be absorbed completely. Therefore, the maximum efficiency of semi-infinitely thick silicon photovoltaic devices is 33.5% at room temperature and AM1.5 according to the work of Shockley and Queisser in 1961 [1]. Further considering the radiative and Auger recombination, the efficiency is calculated as 29.4%. However, the highest efficiency for the single-junction silicon solar cell is 25%; thus, it has still much room for improvement. Operating a silicon solar cell involves the following steps: light generates the electron–hole pairs, the electron and hole are separated by a p–n junction, and the solar cell exports voltage and hence power to the external circuit load.

    The efficiency of a solar cell may be broken down into thermodynamic efficiency, charge carrier separation efficiency, and conductive efficiency. The overall efficiency is the product of each of these individual efficiencies. The efficiency of a solar cell is determined as the fraction of the incident power that is converted to electricity and is defined as:

    (2.6)

    where VOC is the open-circuit voltage, ISC is the short-circuit current, FF is the fill factor, and η is the efficiency.

    Figure 2.2 represents the efficiency losses at different steps in a silicon solar cell [26, 27]. First, photons with energy lower than the bandgap (< Eg) could not be absorbed and transmit through the cell.

    Figure 2.2 Schematic of efficiency losses in a silicon solar cell (see the main text).

    1. Thermal loss. Photons with energy higher than the energy bandgap of silicon (> Eg) could generate an electron–hole pair, leaving the electron and hole excited into a higher-energy unoccupied state. The energy of the photon absorbed is necessarily greater than the bandgap energy; however, the light-generated carriers that are excited to a higher energy level would interact with the lattice and hence return to the conduction band by transferring the energy to phonons. During this process, high-energy photons would lose part of the energy in the form of thermal energy, which is called thermalization [26, 27].

    2. Junction loss. Light-generated carriers would be separated in the p–n junction region and then transported to the respective electrodes. Some energy may lose during this step in the p–n junction.

    3. Contact loss. The metal–semiconductor contact may also induce the voltage loss and hence the efficiency loss.

    4. Recombination loss [26, 27]. Any electron that exists in the conduction band is in a meta-stable state and prone to stabilize to a lower energy position in the valence band. When this occurs, it must move into an empty valence band state, resulting in the removal of a hole. This process is called recombination. Basically, there are three basic types of recombination in the bulk of semiconductors. These are radiative recombination, Auger recombination, and Shockley–Read–Hall recombination. Otherwise, recombination can be classified by the region in which it occurs into bulk recombination and surface recombination. Recombination of minority carriers during transportation would also cause the loss of efficiency.

    Radiative recombination, also called band-to-band recombination, is not the predominant recombination type in silicon solar cells. Recombination through defects, also called Shockley–Read–Hall or SRH recombination, occurs with the assistance of defects in the silicon material. SRH recombination is a two-step process. Both impurities and crystal imperfections could become SRH recombination centers and induce deep energy level into the bandgap to capture minority carriers. There are always two steps involved in SRH recombination. An electron (or hole) is trapped by an energy state in the forbidden band, and if a hole (or an electron) moves up to the same energy state before the electron is thermally re-emitted into the conduction band, then it recombines. Efficiency loss from SRH recombination depends on the density of defect state, the energy level of the defect induced into the bandgap, and the carrier capture cross section. SRH recombination occurs not only in bulk silicon but also in the surface region.

    Auger recombination involves three carriers and needs the help of one phonon. An electron and a hole recombine, but rather than emitting the energy as heat or as a photon, the energy is given to a third carrier, an electron in the excited level. This electron then thermalizes back down to the conduction band edge and delivers energy to a phonon.

    Auger recombination is prone to occur in a heavily doped region or under a high-level injection condition like large current or high intensity of light, in which the carrier concentration is quite high. In silicon-based solar cells, Auger recombination dominates the emitter region, which is near the surface and always heavily phosphorous doped, and may limit the lifetime and the ultimate efficiency. The more heavily doped the material is, the shorter the Auger recombination lifetime [28].

    Both bulk and surface recombination could affect collection of the light-generated carriers and therefore the short-circuit current. Usually, the collection probabilities near the front and rear surfaces are relatively low. This is partly due to the distance between the carrier formation sites and the surfaces being longer than the carrier diffusion length, and also partly because of the surface region recombination. The front surface is the high recombination region with many defects and high carrier concentration, and the generated carriers have to transfer a long distance—nearly the whole wafer thickness to the rear surface. Therefore, the quantum efficiency at the short wavelength and long wavelength is lower since blue light with a high absorption coefficient is absorbed very close to the front surface; infrared light generates carriers deep in the device. The quantum efficiency of a solar cell quantifies the effect of recombination on the light generation current.

    Recombination may also affect the forward bias injection current and therefore the open-circuit voltage. The forward bias diffusion current is dependent on the amount recombination in a p–n junction and increasing the recombination increases the forward bias current. Consequently, high recombination increases the forward bias diffusion current, which in turn reduces the open-circuit voltage. The material parameter that gives the recombination in forward bias is the diode saturation current.

    In summary, the efficiency of a silicon solar cell is affected by many factors including material, device structure, and manufacturing techniques, resulting in light loss, recombination loss, and contact resistance loss. Generally, we can classify these losses into two categories: light loss and electrical loss.

    2.2.3 New Strategies for the Silicon Solar Cell

    Up to now, many efforts have been devoted to reduce the abovementioned two kinds of losses from different aspects, such as modifying the device design, improving the production technology, and using high-quality materials.

    To improve the silicon solar cell efficiency by reducing light loss, more surface treatment is applied in cell manufacturing. Advanced light trapping surface structure is used to enhance antireflection of the front surface, such as new texture technology and improved insulator coatings. Improving screen printing technology and reducing the front metal contact area are also effective by increasing the light absorbing area on a single wafer. At the same time, a rear surface coating is applied to increase the reflection of light reaching the rear region.

    Controlling the electrical loss of silicon solar cells is even more important by using the following methods: (1) Utilizing better quality materials, such as high-performance silicon or n-type silicon. (2) Developing new passivation technology to reduce the carrier recombination in the front and rear surface region, like improved passivation film. (3) Optimizing the p–n junction formation technique for a better emitter and to increase the effective electron–hole separation in the junction region. (4) Improving the metallic contact properties to decrease the contact loss.

    In conclusion, efforts to achieve a more efficient silicon solar cell can be classified as shown in Figure 2.3. The final efficiency of a silicon solar cell is dependent on the open-circuit voltage, the short-circuit current, and the fill factor. Improvement of wafer quality, emitter, light trapping, metallic contact, and front/rear surface passivation could realize a higher efficiency by increasing VOC, ISC, and FF. Therefore, in the following section, some high-quality and low-cost materials and several new cell structures and techniques are reviewed.

    Figure 2.3 New strategies for the high-performance silicon solar cell.

    2.3 Low-Cost Crystalline Silicon

    Although the price of poly silicon raw material has been going down recently, the price of wafer still occupies a nonnegligible portion in the whole silicon PV system. Both crystal growth and silicon purification could be improved to decrease the relevant cost and to obtain a low-cost and high-efficiency silicon PV.

    2.3.1 Metallurgical Silicon

    The raw material for production of the ingot crystalline silicon is the high-purity SiO2. The current producing technique is the carbothermic reduction of SiO2 at about 1700°C, accompanied by serious carbon releasing, high-energy consumption and thermal releasing. The received metallurgical-grade silicon has a purity of around 99%, not pure enough for photovoltaics. In order to reduce the greenhouse gases, a promising novel and advanced technology should replace the current old-fashioned charcoal process. Chen et al. and Nohira et al. have reported a fast, complete, and low-energy method to prepare silicon from SiO2 by electroreduction. The porous pellets of SiO2 powder or its mixture with other metal oxide powders can be electro-reduced to pure silicon or the respective silicon alloy powders in molten CaCl2 at 900°C [29–32].

    2.3.2 Upgraded Metallurgical-Grade Silicon

    Recent solar grade silicon (SOG-Si) is usually produced by a modified Siemens process or an FBR (fluidized bed reaction) method. These chemical routes purify metallurgical-grade silicon by oxidizing it into gaseous silicon-hydrogen-halogen compounds, distillation purification, and reduction to SOG poly silicon. However, the silicon material produced from these chemical processes is too expensive, requiring heavy investment for the whole complicated technique and facilities. Meanwhile, a large amount of energy consumption and the gas exhaust from the process could be detrimental to the environmental and does not match the cost-effective silicon PV industry developing direction.

    One promising alternative process for producing SOG silicon is by metallurgical process routes with steps like directional solidification, acid leaching, and so on, and the received silicon is usually called upgraded metallurgical-grade silicon (UMG-Si) [33–36]. The production process of UMG Si has a lower energy consumption and lower price of infrastructure, and hence a lower cost. The process involves low temperatures, thus avoiding high thermal budget. However, UMG-Si contains more impurities, including metallic impurities and especially dopant impurities like B, P, and Al, than silicon from the modified Siemens method. The impurity concentration in common SOG silicon is around ppb, while concentration in UMG silicon is higher, about ppm. The metallurgical route is relatively effective to remove metallic impurities like iron and copper, but is hardly useful to remove the B and P impurities due to their high segregation coefficients (ratio of the element concentration in solid silicon to that in liquid silicon). As a result, UMG silicon presents lower carrier lifetime and is always compensated due to the remaining high-concentration dopant atoms. Then, the lower carrier mobility and serious light degradation from B–O complex p-type silicon and even n-type silicon are inevitable [37]. All the above would be detrimental to the solar cell efficiency. Therefore, more effective metallurgical process and novel cell structures have been investigated for years.

    2.3.2.1 Properties of Upgraded Metallurgical-Grade Silicon

    The concentrations of boron, aluminum, and phosphorus in UMG-Si are higher than that in the conventional solar cell grade wafers. Typical levels of boron and phosphorus in UMG-Si are 1–3 ppmw and 3–5 ppmw, respectively. The content of metallic impurities in UMG-Si is slightly higher than that in the conventional mc-Si such as iron, but still in the level in accordance with the electrical performance of silicon wafers [33].

    The substitutional carbon and the interstitial oxygen concentrations in UMG-Si are around 30%–70% higher than that in conventional mc-Si, which can be attributed to the lower purification efficiency of the metallurgical route. The crystal defect (mainly dislocation) contents in UMG-Si is at the same level as that in conventional mc-Si. Therefore, both carbon/oxygen concentration and defect content would not play a detrimental role in the final cell performance, except for the fact that defects may be enhanced by some higher-concentration impurities probably leading to a stronger recombination activity of the defects in UMG wafers.

    Considering the ionization of boron, phosphorus, and aluminum, the concentration of the above elements is in accordance with the resistivity. The resistance of the Siemens mc-Si is often around 1 Ω·cm for the benefit of solar cell property. However, due to the higher impurity content including boron and phosphorus [35], the resistance of UMG-Si samples is about 0.3 Ω·cm, which is much lower than that of the normal mc-Si wafers. The boron concentration can be calculated as majority carrier concentration without compensation, while in UMG-Si the boron dopant is partially compensated by phosphorus. Meanwhile, while producing silicon ingot from Siemens poly silicon, the dopant would be added during the crystal growth process to achieve a suitable resistivity. In UMG-Si, the concentration of the B or P dopant is already as high as ppm. Thus, there is no need to add dopants again. The segregation coefficients of B and P are different (the segregation coefficient of B is 0.8–0.9, that of P is 0.36). Thus, B and P would present different concentration distributions from top to bottom in the UMG-Si ingot. Therefore, the compensation level and the resistivity are of axial variation [38].

    The effective lifetime of the minority carrier in the UMG-Si wafer is about one-third of or less than that of the conventional silicon. The minority carrier lifetime thus reflects the quality of the silicon material in a direct way [39] and the poor electrical properties of UMG-Si may lead to low efficiency of the solar cells made from this type of material.

    For UMG-Si, there is a net doping concentration, considering the incomplete ionization of the B atoms. Because of the dopant compensation, there are more ionized scattering centers, leading to the reduction of both majority and minority carrier mobilities. As the total amount of B and P increases, the carrier mobilities decrease accordingly.

    2.3.2.2 Production of Upgraded Metallurgical-Grade Silicon

    Several methods are utilized in the metallurgical route: acid leaching, slag treatment, plasma purification, directional solidification, and evaporation under vacuum [40].

    Acid leaching. In this process, acid washing is applied on the pulverized silicon material. Impurities, especially metallic impurities and boron aggregated at the grain boundaries, can be effectively removed. This step is a low-temperature method and consumes low energy with simple instruments. Therefore, acid leaching is one of the most commonly used methods and always is a pretreatment method prior to the metallurgical refining techniques, resulting in a 3N purity of the silicon material.

    Slag treatment. The slag is often affine with impurities and could react and form stable compounds. These compounds would become the precipitate phase during the solidification process and then be removed by acid washing or other methods. It proves to be a relatively effective method for removing boron from silicon melt. Boron is oxidized and then bound to the slag phase or volatilized to the atmosphere in the form of boron oxides. Silicates like CaO-SiO2-10% CaF2, CaO-SiO2-Li2O, or Li2O-SiO2 have been used as slags to remove boron [41–43].

    Plasma purification. The raw materials are heated by a plasma induction furnace. Then, the gas with oxygen, hydrogen, and chlorine is blown by the plasma torch away from the surface and reacts with impurities to volatile compounds [44].

    Directional solidification. This method could mainly remove the metallic impurities and other impurities with small segregation coefficients [45, 46].

    Evaporation under vacuum. The raw material is heated to melt in a vacuum melting furnace. Some impurities could be evaporated from the surface. This step could reduce the concentration of impurities with high evaporation coefficient in silicon like P, As, Ga, and In [46, 47].

    Apart from the abovementioned methods, float zone and Al–Si melt could also refine metallurgical silicon to a higher

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