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Failure-Tolerant Computer Design
Failure-Tolerant Computer Design
Failure-Tolerant Computer Design
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Failure-Tolerant Computer Design

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Failure-Tolerant Computer Design focuses on the use of redundancy theory in improving the reliability of computers. The book first offers information on redundancy theory and limit theorems. Discussions focus on applications in determining the optimum placement of restoring organs; time asymptotes for log failure probability for exponential survival probability; reliability of multiple-function system with paralleled individual units; and basic concepts for making reliable computers out of unreliable parts. The text then examines decision theory in redundant systems and adaptive decision elements. The publication examines the interconnection structure for redundant logic and redundant relay theory. Topics include Moore-Shannon limit theorem; systematic groupings of inputs in single-layer error-correcting interwoven redundant logic; interwoven logic with alternating-layer error correction; and interwoven logic with single-layer error correction. The book also elaborates on transition analyses in reliability theory, including Markov chain theory and probability bounds in Markov chains having many states or inexactly known transition matrices. The manuscript is a vital source of data for engineers and researchers interested in failure-tolerant computer design.
LanguageEnglish
Release dateMay 12, 2014
ISBN9781483263472
Failure-Tolerant Computer Design

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    Failure-Tolerant Computer Design - William H. Pierce

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