Nanoscale Field Effect Transistors: Emerging Applications

By Ekta Goel and Archana Pandey

Nanoscale Field Effect Transistors: Emerging Applications is a comprehensive guide to understanding, simulating, and applying nanotechnology for design and development of specialized transistors. This book provides in-depth information on the modeling, simulation, characterization, and fabrication of semiconductor FET transistors. The book contents are structured into chapters that explain concepts with simple language and scientific references.

The core of the book revolves around the fundamental physics that underlie the design of solid-state nanostructures and the optimization of these nanoscale devices for real-time applications. Readers will learn how to achieve superior performance in terms of reduced size and weight, enhanced subthreshold characteristics, improved switching efficiency, and minimal power consumption.

Key Features:

Quick summaries: Each chapter provides an introduction and summary to explain concepts in a concise manner.

In-Depth Analysis: This book provides an extensive exploration of the theory and practice of nanoscale materials and devices, offering a detailed understanding of the technical aspects of Nano electronic FET transistors.

Multidisciplinary Approach: It discusses various aspects of nanoscale materials and devices for applications such as quantum computation, biomedical applications, energy generation and storage, environmental protection, and more. It showcases how nanoscale FET devices are reshaping multiple industries.

References: Chapters include references that encourage advanced readers to further explore key topics.

Designed for a diverse audience, this book caters to students, academics and advanced readers interested in learning about Nano FET devices.

Readership

Students, academics and advanced readers

• Language: English
• Publisher: Bentham Science Publishers
• Release date: Dec 20, 2023
• ISBN: 9789815165647

Book preview

Role of Nanomaterials: In Novel Semiconductor Field Effect Transistors

Chandra Keerthi Pothina¹, J. Lakshmi Prasanna¹, M. Ravi Kumar¹, Chella Santhosh¹, *

¹ Department of Electronics and Communication Engineering, Koneru Lakshmaiah Education Foundation, Vaddeswaram, Guntur (Dist.), Andhra Pradesh, India

Abstract

We are constantly looking to scale down the dimensions of transistors to increase density in the same specific area and at the same time, having powerful functions and increased performance. We have now reached the stage of submicron technology where MOSFETs (metal oxide semiconductor field effect transistors) and FinFETs (fin shaped field effect transistors) cannot be scaled down further. MOSFETs replaced BJTs decades ago, but now transistors seem to have hit their end. While semiconductor giants have a road map to produce 2 nm transistors, scaling down further is next to impossible. Later, FinFETs were considered as their 3-dimensional structure enabled greater density, greater computational power, and lower switching times. But scaling down also means more thermal generation. Thermal effects, high capacitances, and high fabrication costs deemed FinFETs not very suitable for scaling down beyond 7nm. How can we enable transistors to scale down further and follow Moore’s law? The next apparent step would be nanotechnology. While it could be a revolution in VLSI it comes with its own cons and challenges. While there is a lot of research going on regarding the same, this chapter will discuss types of nanomaterials based on dimensions like 0D, 1D, 2D, and 3D, and their respective roles in semiconductor FETs and why it is the next sensible step in the semiconductor industry.

Keywords: Carbon nanotubes, Gate all around FETs, Light emitting FETs, Multi-bridge channel FETs, Nanomaterials, Nanowires, Nanosheets, Nanoparticles, Quantum dots, Semiconductor FETs.

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* Corresponding author Chella Santhosh: Department of Electronics and Communication Engineering, Koneru Lakshmaiah Education Foundation, Guntur (Dist.), Andhra Pradesh, India; E-mail: [e-mail]

INTRODUCTION

Materials with at least one dimension in the nanoscale that is between 1 nanometre (nm) and 100 nanometres are considered nanomaterials. The European

Commission defines nanomaterials as materials which have at least half of the constituent particles of size 100 nm or less. While nanomaterials share similar composition with their bulk materials, they differ in physical and chemical properties like colour, strength, ductility, conductivity, fluidity, physical state and many more [1].

Nanomaterials can occur naturally, like proteins and lipids in the human body. While some are made incidentally meaning they are produced during combustion, vaporisation, usage, aging, and corrosion of particles. Fullerenes, a class of nanomaterials, are a good example of incidental nanomaterials. The third type of nanomaterials, which is mostly focused upon, is engineered nanomaterials which are engineered and manufactured in particular ways to have specific useful properties.

Nanomaterials have a plethora of uses as they offer many advantages, besides the obvious one of small size, like high strength, high surface-to-volume ratio, increased porosity, ductility, conductivity, and others offering endless possibilities of manipulation of properties and have many applications in military, pharmaceutical, biosensing, cosmetic and other industries [2].

Nanomaterials can be classified based on how many dimensions do not fall in the nanoscale or how many fall in the microscale. For example, 1 dimension in the macroscale means the other 2 dimensions are in the nanoscale, this nanomaterial would be a 1D(1-dimension) nanomaterial.

Below is a Table 1 to simplify the classification:

Table 1 Classification of nanomaterials.

The main question is how do nanomaterials fit into the picture of VLSI (very large-scale integration)?

As transistors are scaled down further for smaller size, higher density, lower power consumption, more powerful functions and increased performance, conventional FETs that use Silicon have hit their end. For instance, to make a 2 nm transistor using Silicon, a Silicon atom is 0.2 nm wide so a 2nm transistor is composed of 10 atoms, which make it hard to control the flow of electrons as quantum effects come into play. Sub 10 nm technologies also encounter thermal effects, short channel effects, and tunnelling which make them less effective and less reliable. Hence nanomaterials are the next best alternative. In this chapter, we explore how the three types of nanomaterials can be used in transistors, their principles, applications, and problems.

ROLE OF 2D NANOMATERIALS OR NANOSHEETS IN SEMICONDUCTOR FETS

Nanosheet is a 2D nanomaterial with 1 dimension in the 1-100 nm range. Graphene is the thinnest 2D material made up of a single layer of Carbon atoms with hexagonal lattices is an example of a nanosheet.

As transistor sizes keep scaling down, it gets harder to keep up with Moore's law which states that the number of transistors doubles about every 2 years. After the trend of MOSFETs (metal oxide semiconductor field effect transistors) came FinFETs and then Gate all around (GAA) nanowire FETs. FinFETs used 3 gates and were majorly involved in producing 22 nm, 14 nm, and 7 nm transistors. FinFETs could not be scaled down beyond 7 nm due to problems like leakage current, layout, increasing costs, and decreasing performance issues. GAA nanowire FETs posed parasitic capacitance problems.

About a decade of research later, companies like IBM, Samsung, and Google have arrived at nanosheet FETs to scale down to as low of a size as 2 nm using extreme UV lithography and stacking nanosheets producing transistors with 4 gates.

In 2017, IBM produced a 5 nm chip which is 30 billion transistors dense scaling down from a 7 nm chip that can fit 20 billion transistors. The 5 nm chip is as big as a fingernail with an increase of 40% in performance and 75% in power efficiency than 7 nm technology [3].

Samsung in 2019 introduced 3 nm GAA nanosheet transistors with a 45% reduced area, 50% less power consumption, 35% increase in performance compared to 7 nm technology. Conventional or nanowire-based GAA FETs use a greater number of stacked nanosheets, whereas Samsung’s patented version of GAA-MBCFET (gate all around- multi-bridge channel FET) uses nanosheets enabling greater control over the width of nanosheet and more current per stack [4].

Also, MBCFET is compatible with FinFETs meaning they can share the same manufacturing technology and equipment, making its production easier and faster.

Later, in 2021 IBM came up with 2nm transistors that are narrower than a strand of DNA and can fit about 50 billion transistors. Though still experimental, this has the possibility of boosting smartphone performances and other consumer electronics, making them last as long as 4 days with a single charge, contributing to AI (artificial intelligence) object recognition, reducing reaction time in autonomous vehicles and saving energy by reducing carbon footprint in data centres.

This is made possible using nanosheets that are about 8-50 nm wide. Nanosheets, also known as gate all around or multi-bridge channel or nanobeam transistors, solve problems FinFETs encounter. It has a power density barrier of 100 watts per square centimetre, the highest in the semiconductor industry for the past decade [5].

Single Layer MoS2 Field Effect Transistors

While graphene, which is a single layer of Carbon atoms, is a popular 2D nanomaterial with exceptional properties, transition metal dichalcogenides (TMDCs) like Molybdenum disulphide (MoS2), Tungsten Di selenide (WSe2) which are thin single layer semiconductors offer better properties. Due to its 2D atomically layered structure, MoS2 provides easy patternability and device fabrication, unique quantum luminescence efficiency, and exhibits high channel mobility. Problems like direct source-drain tunnelling, high resolution photolithography, and short channel effects have compromised the scaling down of state-of-art Silicon based transistors. This is exactly what makes MoS2 a viable future alternative, as it has a wide bandgap which reduces tunnelling effects, and improves transport properties in the channel due to the lack of dangling bonds (Atoms at the edge of a crystal that have an unsatisfied valence). At sub-10-nm channel lengths, MoS2 maximizes gate modulation efficiency, has low dielectric constant ε = 4-7 and has greater mobility (5 cm²/V·s) than graphene at almost the same thickness. The MoS2 composite FET has an IOFF of 10 pA/µm and an ION/IOFF in excess of 10⁷, record-low resistance of 75 Ω·µm, low-field mobility of ~25 cm²/V·s and a carrier injection velocity of ~10⁶ cm/s [6].

Requirements like labelling the biomolecules, low power consumption, portability, inexpensive mass production, and integration of both sensor and measurement systems on a single chip are turning the biomedical industry’s interest toward FETs. Unlike conventional FETs where the gate modulates the current flowing between source and drain, which are connected by a channel, in a FET biosensor, the physical gate present in a logic transistor is removed, and the dielectric layer is functionalized with specific receptors for selectively capturing the desired target biomolecules. The charged biomolecules, when captured, produce a gating (electrostatic) effect, which is transduced into a readable signal in the form of a change in electrical characteristics of the FET, such as drain-to-source current or channel conductance.

MoS2 FETs have great potential in applications of biosensing due to their high sensitivity, which is 74 times the sensitivity of graphene. Graphene has a lack of bandgap, but MoS2 is a TMDC that has a direct bandgap with 2D stacked layers of covalent bonds between metal and chalcogenide atoms in a hexagonal lattice held together by weak Van Der Waals forces. Due to its sizeable bandgap, which ranges from 1.8eV for a monolayer to 1.2eV for bulk, it has less leakage currents and excellent subthreshold swing. For instance, even with a thick dielectric of 35 nm, MoS2 has a better subthreshold swing of 150 mV/dec [7].

Subthreshold swing is a critical parameter which indicates the efficiency of the gating effect and sensitivity of the biosensor. It indicates the change in gate voltage required to change the subthreshold current by one decade.

Subthreshold swing, SS = dVGS/ d(log10(ID))

where dVGS = change in gate voltage,

ID = Drain current.

The smaller the SS, the higher the sensitivity due to the gating effect produced by the pH change in biomolecules the FET is sensing. Graphene provides a much lower sensitivity of 2.6, whereas MoS2 provides 193 for the same pH levels.

Besides, it is also highly flexible and transparent, making it a great option for diagnosis and even artificial organs. MoS2 also has a low response time, even for low concentration detection of biomolecules offering great potential in health, forensic and security applications.

MoS2 transistors also find applications in optoelectronics. It has good photoresponsivity (which is solely determined by illuminated optical power at the constant drain or constant gate voltage), fast photo switching capabilities, good incident-light control, which is controllable and can be manufactured by low-cost exfoliation method. It opens opportunities for 2D FETs in switches, memories, amplifiers, light-based sensors and more optoelectronic devices and applications in the future [8].

Two-Dimensional Indium-Selenide Field-Effect Transistors

Another 2D semiconductor, Indium Selenide (InSe), a IIIA monochalcogenide, is also of interest due to its properties like direct-to-indirect bandgap, luminescence emission, goof photosensitivity and a broad photo detection range. Additionally, its ultra-thin body structure is attributed to high gate control, weak surface scattering and high carrier mobility. It also offers better transfer characteristics and subthreshold swing compared to conventional FETs. They offer a high on-off ratio ION/ IOFF of ~104, large peak transconductance (~13 mS/μm in 6-nmregime) and isotropic transport behaviour [9].

In research conducted with sandwiched ohmic contact with indium for InSe FET, device performance levels, and devices with gate lengths of 7, 5, and 3 nm were investigated. All metrics of sandwiched contacted devices far exceed the requirement of the International Technology Roadmap for Semiconductors (ITRS) and exhibit obvious promotion as compared to conventional structures. An increase of current with 69.4%, 50%, and 49% is achieved for devices with 7, 5, and 3 nm gate length, respectively, against other 2D FETs. Meanwhile, maximum reduction of the intrinsic delay with 20.4%, 16.7%, and 18.9% are attained. Thus, presenting favourable capabilities for next generation high-performance applications using sub-10 nm nodes [10].

Researchers at Peking University have reported a 10 nm FET with 2D indium selenide (InSe) with high thermal velocity, which operates at 0.5 V and achieves record high transconductance of 6 mS μm-1 and a room-temperature ballistic ratio in the saturation region of 83%, surpassing those of any reported silicon FETs. An yttrium-doping-induced phase-transition method is developed for making ohmic contacts with InSe. This FET has a low subthreshold swing (SS) of 75 mV per decade and drain-induced barrier lowering (DIBL) of 22 mV V-1 hence suppressing short channel effects effectively. Furthermore, a low contact resistance of 62 Ω μm is reliably extracted in 10-nm ballistic InSe FETs, leading to a smaller intrinsic delay and much lower energy-delay product (EDP) than Silicon [11].

Compared with other well-known 2-D transistors, the transfer characteristics of InSe FETs are competitive. InSe is a promising channel material for future FETs, and the monolayer InSe FETs are favourable for high-performance applications.

ROLE OF ONE-DIMENSIONAL NANOMATERIALS IN SEMICONDUCTOR FETS

With transistors becoming smaller, power consumption is reducing at a slower rate than increasing density, this results in increased thermal density. With constant scaling down, short channel effects and reduced gate control have made transistors reach their performance limits. Gate capacitance must be increased by reducing gate oxide thickness, but this causes leakage power issues and reduces reliability. Besides small sizes and increased speed, reduced power dissipation and thermal management are the main aspects of concern in VLSI.

Nanowires and Their Role in Field Effect Transistors

Nanowires are one-dimensional nanomaterials that are rod/tube-like structures whose diameter is in the nanoscale while length can vary. Only electrons and photons can propagate through its length. It is the smallest structure that can effectively transport electrons. Its high surface area-to-volume ratio enables fast transfer of materials making them good detectors. While bulk Silicon has an indirect band gap, Silicon nanowires have direct bandgap making them suitable for optoelectronic, photodetection, energy harvesting, solar power, and photovoltaic applications.

Nanowires can be organic or inorganic. They can also be classified based on conductivity like metallic (Ni, Pt, Au), semiconductor (Si, InP, GaN), insulating (SiO2, TiO2), and superconducting (YBCO). There are multi-segment nanowires as well, where multiple layers of different materials in the nanoscale are engineered, which mostly is not possible in their respective bulk materials and used to make sensors and actuators [12].

Nanowires offer properties that enhance functionality and perform in ways that fix problems caused by traditional thin film technology. They can be used to construct novel structures with higher performance and make excellent building blocks for printable electronics. Nanowires, due to their asymmetric shape, allow tunability of quantum effects and have even more volume than quantum dots.

Nanowires have excellent charge carrier mobility, that is, how quickly an electron can move through a metal or a semiconductor in the presence of an external electric field. But how does high electron mobility benefit? The faster the electrons accelerate, they require less energy to travel; hence, we do not need to apply high voltages saving on power. Group III-V semiconductors like GaAs, due to direct band gaps, have even higher intrinsic electron mobility.

A major drawback with respect to nanowires is that even small defects or roughness in the surface of nanowires result in irregularities in the density of states along the nanowire axis. Besides roughness can cause imperfect growth during the fabrication process, even the existence of impurities can cause the scattering of electrons. Scattering is commo,n especially below 10 nm, but since trajectories of charge carriers are extremely thin in extremely small one-dimensional nanomaterials, they can be entirely backscattered, unlike in bulk materials where they are only slowed down. This affects charge carrier mobility and conductance in a negative way.

Another unique and interesting property offered by nanowires is that they can survive high elastic strains without altering the crystalline structure of the material. This property was used to further enhance already high carrier mobility by building a core-shell heterostructure by a group of researchers in Dresden, Germany. An ultra-thin core was made out of Gallium-Arsenide and covered with a shell of Indium Aluminium Arsenide. The mismatched crystalline structures of the core and the shell cause the shell to exert a high mechanical strain on the thin core. The strain exerted by a mass of electrons from the shell makes the electrons in the core lighter and hence faster. This increases carrier mobility by 35-40% at room temperature and can be even higher in low temperatures. This can be used for trends demanding smaller ultra-fast transistors with great switching speeds and in contactless optical spectroscopy, flexible electronics, quantum applications, supercomputing technology, and many others [13].

In an analysis, Nanowire FETs of Silicon, Germanium, Gallium Arsenide, and Indium Arsenide nanowires have been analysed with respect to drain current, subthreshold swing (current-voltage characteristic of FET in the subthreshold region) and electron density against decreasing channel length. With the downward trend of channel length, all three aspects have shown an increasing trend making Nanowire FETs a very viable alternative for minimising short channel